| 1. | All processors must be designated as either big endian or little endian
任何处理器都必须设计成要么是大端字节序，或者要么小端字节序。 |
| 2. | If the stack will run on a big endian processor , there ' s nothing to worry about
如果该栈运行在一个大端字节序的处理器上，则于此不必担心。 |
| 3. | This means that control data within the tcp ip stack is naturally in order for big endian machines
这意味着，对高位优先的机器来说，在tcp / ip内控制数据是自然有序的。 |
| 4. | Big endian means that the most significant byte of any multibyte data field is stored at the lowest memory address , which is also the address of the larger field
大端字节意味着任意多字节数据字段的高位字节存储于低的内存地址中。低内存地址也是大字段的地址。 |
| 5. | Big endian architectures , such as the powerpc , have an advantage over little endian architectures such as the intel pentium series in that network byte order is big endian
高位优先架构（比如powerpc ）比低位优先架构（比如intel pentium系列，其网络字节顺序是高位优先）有优势。 |
| 6. | But what happens if a client running on a big endian ibm powerpc attempts to send a 32 - bit integer to a little endian intel x86 ? byte ordering will cause the value to be interpreted incorrectly
但是，如果一个运行在高位优先的ibm powerpc上的客户端发送一个32位的整数到一个低位优先的intel x86 ，那将会发生什么呢？ |
| 7. | Support for broadcom s sb1a evaluation board bcm91480b " bigsur " , which is based on the bcm1480 quad - core chip , has been added , both to the kernel and the installer . this board is supported both in little and big endian mode
已新增了对于broadcom的sb1a评估板，使用bcm1480四核晶片的bcm91480b " bigsur "在kernel及安装程式上的支援，且同时支援了这个板子的little及big endian模式。 |
| 8. | My work include : ( 1 ) analyze the architecture of dicom application entity and working mechanism and implement the model of dicom network communication based on tcp / ip . complete the communication between 3 kinds transfer syntax : implicit vr little endian , explicit vr little endian , explicit vr big endian
主要的工作包括： （ 1 ）分析dicom应用实体结构以及运行机制，实现了基于tcp / ip协议的dicom网络通讯模型，完成了具有隐式表示低字节优先字节顺序、显示表示低字节优先字节顺序以及显示表示高字节优先字节顺序三种传输语法的服务对象对的传输。 |
